About

An extrapolation of today's high performance deep-submicron systems implies packaging an ever-increasing power into a very small area. Thus, if left unchanged over the next decade, system temperature will rise from the equivalent of a hot plate to one eventually rivalling that of the surface of the sun. Design of systems and complex integrated circuits in the next generations of deep submicron technologies (65 nm and beyond) ask for drastic innovative solutions to control dynamic and static power consumption and reduce an exponentially increasing power leakage. Just as previous designs involved tradeoffs between delay, throughput and area, new complex designs must balance delay, throughput, and power consumption. Solutions usually

• maximize power efficiency by reducing power leakage and minimizing power consumption for basic components, devices, blocks, software execution, and overall system, and

• influence the power equation by providing a segmented usage model exploiting power-aware design, manufacture, and application coding techniques.
  
  

Low-power design is the enabling technology and a critical prerequisite for the technical and commercial success of many future applications, including mobile telecommunications. Many previous and currently running MEDEA+ projects focus on various application domains, with low power being one (of many) significant design constraints.

A central theme of the LoMoSA project involves the creation of a European low-power expertise for mobile and multimedia applications. This project will enable fast development of future battery-operated devices that combine a high computing power with ultra low power dissipation and low cost for new mobile and multimedia applications such as portable personal video receiver, 4G terminal application, and mobile TV. For power-operated devices, the project results will help avoid expensive packaging and forced-air cooling. Many of the low-power optimised LoMoSA deliverables could be utilised in future application-specific MEDEA+ and other projects.

This project will drive a major step in reducing overall system power consumption (active and standby power) up to 70% in 2008. There is however no 'silver bullet' solution to the power problem. The gain in overall power consumption needs is to be achieved through power reduction at all levels of system development (architecture, software, circuit design, libraries, and devices).

Next generation multiprocessor SoC architectures based on a HW platform and SW applications communicating through a distributed Network-on-Chip (NoC) have increased power requirements. In order to meet these complex requirements and reduce the design cycle, the LoMoSA+ project aims also to develop further the concept of hardware-dependent software (HdS). We define HdS to be "software directly dependent on the underlying hardware". It enables true concurrent development and low-power optimization of both HW and SW in SoC design, thus helping in keeping power consumption under control for these architectures. Low clock rates in conjunction with lower voltages are one of the most valuable contributions to power savings in programmable devices. This can be accomplished by the introduction of multiple processors with lower clock rates instead using one processor with a high clock rate. As a matter of fact the programming of these parallel architectures is a challenge, moreover tool support is very rare. Accordingly, the hardware dependent software layer needs to be adapted to these new requirements.

A hardware-dependent layer will isolate hardware-independent software from hardware, simplify access to hardware components, offer scalability and enable reuse for distributed systems at specific application domains. This is similar to industry-standard interfaces existing between applications, middleware, and RTOS.

LoMoSA will achieve its goal by initiating the development of a low-power platform for mobile and multimedia applications, consisting of an interacting combination of architectural models, design flows and methodologies, hardware design components, embedded software and test-benches. The 'horizontal structure' of LoMoSA places it in the correct position for exploiting best solutions. The project will pave the way for the creation of a European Low-Power Platform. Project deliverables will essentially correspond to platform components. Interaction of these project deliverables will be demonstrated for some specific mobile multimedia applications. The developed hardware implementations will be validated in advanced CMOS technology (90 nm or 65 nm). Many of the developed low-power components, as well as the techniques and methods could also find their way in other advanced technologies.